Blar i NTNU Open på forfatter "Alipour, Mehdi"

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    • Delay and Bypass: Ready and Criticality Aware Instruction Scheduling in Out-of-Order Processors 

      Alipour, Mehdi; Kumar, Rakesh; Kaxiras, Stefanos; Black-Schaffer, David (Peer reviewed; Journal article, 2020)
      Flexible instruction scheduling is essential for performance in out-of-order processors. This is typically achieved by using CAM-based Instruction Queues (IQs) that provide complete flexibility in choosing ready instructions ...

    • Dependence-aware Slice Execution to Boost MLP in Slice-out-of-order Cores 

      Kumar, Rakesh; Alipour, Mehdi; Black-Schaffer, David (Peer reviewed; Journal article, 2022)

    • FIFOrder MicroArchitecture: Ready-Aware Instruction Scheduling for OoO Processors 

      Alipour, Mehdi; Kumar, Rakesh; Kaxiras, Stefanos; Black-Schaffer, David (Journal article; Peer reviewed, 2019)
      The number of instructions a processor's instruction queue can examine (depth) and the number it can issue together (width) determine its ability to take advantage of the ILP in an application. Unfortunately, increasing ...

    • Freeway: Maximizing MLP for Slice-Out-of-Order Execution 

      Kumar, Rakesh; Alipour, Mehdi; Black-Schaffer, David (Journal article; Peer reviewed, 2019)
      Exploiting memory level parallelism (MLP) is crucial to hide long memory and last level cache access latencies. While out-of-order (OoO) cores, and techniques building on them, are effective at exploiting MLP, they deliver ...

    • Ghost loads: what is the cost of invisible speculation? 

      Sakalis, Christos; Alipour, Mehdi; Ros, Alberto; Jimborean, Alexandra; Kaxiras, Stefanos; Själander, Magnus (Chapter, 2019)
      Speculative execution is necessary for achieving high performance on modern general-purpose CPUs but, starting with Spectre and Meltdown, it has also been proven to cause severe security flaws. In case of a misspeculation, ...